
pub(crate) struct Cmd(pub u8);
impl Cmd {
    pub const SET_TRANSCEIVER_MODE: Self = Self(1);
    pub const MAX2837_WRITE: Self = Self(2);
    pub const MAX2837_READ: Self = Self(3);
    pub const SI5351C_WRITE: Self = Self(4);
    pub const SI5351C_READ: Self = Self(5);
    pub const SAMPLE_RATE_SET: Self = Self(6);
    pub const BASEBAND_FILTER_BANDWIDTH_SET: Self = Self(7);
    pub const RFFC5071_WRITE: Self = Self(8);
    pub const RFFC5071_READ: Self = Self(9);
    pub const SPIFLASH_ERASE: Self = Self(10);
    pub const SPIFLASH_WRITE: Self = Self(11);
    pub const SPIFLASH_READ: Self = Self(12);
    pub const BOARD_ID_READ: Self = Self(14);
    pub const VERSION_STRING_READ: Self = Self(15);
    pub const SET_FREQ: Self = Self(16);
    pub const AMP_ENABLE: Self = Self(17);
    pub const BOARD_PARTID_SERIALNO_READ: Self = Self(18);
    pub const SET_LNA_GAIN: Self = Self(19);
    pub const SET_VGA_GAIN: Self = Self(20);
    pub const SET_TXVGA_GAIN: Self = Self(21);
    pub const ANTENNA_ENABLE: Self = Self(23);
    pub const SET_FREQ_EXPLICIT: Self = Self(24);
    pub const USB_WCID_VENDOR_REQ: Self = Self(25);
    pub const INIT_SWEEP: Self = Self(26);
    pub const OPERACAKE_GET_BOARDS: Self = Self(27);
    pub const OPERACAKE_SET_PORTS: Self = Self(28);
    pub const SET_HW_SYNC_MODE: Self = Self(29);
    pub const RESET: Self = Self(30);
    pub const OPERACAKE_SET_RANGES: Self = Self(31);
    pub const CLKOUT_ENABLE: Self = Self(32);
    pub const SPIFLASH_STATUS: Self = Self(33);
    pub const SPIFLASH_CLEAR_STATUS: Self = Self(34);
    pub const OPERACAKE_GPIO_TEST: Self = Self(35);
    pub const CPLD_CHECKSUM: Self = Self(36);
    pub const UI_ENABLE: Self = Self(37);
}
pub(crate) struct TransceiverMode(pub u16);
impl TransceiverMode{
    pub const OFF: Self = Self(0);
    pub const RECEIVE: Self = Self(1);
    pub const TRANSMIT: Self = Self(2);
    pub const SS: Self = Self(3);
    pub const CPLD_UPDATE: Self = Self(4);
    pub const RX_SWEEP: Self = Self(5);
}
#[repr(C)]
pub enum SweepStyle{
    Linear=0,
    Interleaved=1,
}




pub(crate) const TRANSFER_BUFFER_SIZE: usize = 262144;

const MAX2837FIT: [u32; 17] = [
    1750000  ,
    2500000  ,
    3500000  ,
    5000000  ,
    5500000  ,
    6000000  ,
    7000000  ,
    8000000  ,
    9000000  ,
    10000000 ,
    12000000 ,
    14000000 ,
    15000000 ,
    20000000 ,
    24000000 ,
    28000000 ,
    0
];
pub(crate) const ONE_MHZ: u64 = 1000_000;

pub(crate) fn compute_baseband_filter_bw(bandwidth_hz: usize)->u32{

    let mut i = 0;
    let bandwidth_hz = bandwidth_hz as u32;
    while MAX2837FIT[i] != 0 {
        if MAX2837FIT[i] >= bandwidth_hz{
            break;
        }
        i += 1;
    }

    MAX2837FIT[i]
}